1. Field
Exemplary embodiments of the present invention relate generally to a semiconductor memory device. More particularly, the present invention relates to a memory device, and a memory system employing an improved method of correcting data errors.
2. Description of the Related Art
In the early days of the semiconductor memory industry, quite a few original good dies obtained through a semiconductor fabrication process were free of defective memory cells. However, as the capacity of a memory device increased, it became increasingly difficult to fabricate a memory device that does not include any defective memory cells at all. At present, it may be said that there is no memory device that does not include any defective memory cells at all. To solve this problem, various methods have been used heretofore for repairing the defective memory cells. One well-known method includes repairing the defective memory cells with redundant memory cells. Another method employs an error correction code (ECC) circuit in a memory system for correcting an error that occurs in a memory cell.
During a read operation of a memory device, errors of data may be corrected by an ECC circuit, and the error-corrected data may be outputted to the an external or host device of the memory device. Although the error-corrected data are outputted to the an external or host device of the memory device, the errors (i.e., failure data) still remains in the memory cells. When the same memory cells are accessed, the same errors may occur, and often the number of the errors may exceed the error correction capacity of the ECC circuit in which case some errors may remain uncorrected.
In short, the errors of data outputted to an external device or host device of the memory device may be corrected by the ECC circuit, but the data remaining in the memory cells may still include the errors, which is problematic.